SMD-5962-94511 REV B

DLA - CC - DLA Land and Maritime

MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 9 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON

Organization:

Year: 2009

Abstract: This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator.Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:

     Device type     Generic number 1/           Circuit function                    Access time          01                                 4K × 9 CMOS Parallel Synchronous FIFO        50 ns         02                                 4K × 9 CMOS Parallel Synchronous FIFO        35 ns         03                                 4K × 9 CMOS Parallel Synchronous FIFO        25 ns         04                                 4K × 9 CMOS Parallel Synchronous FIFO        20 ns

The device class designator shall be a single letter identifying the product assurance level as follows:

       Device class                              Device requirements documentation             M                      Vendor self-certification to the requirements for MIL-STD-883 compliant,                                   non-JAN class level B microcircuits in accordance with MIL-PRF-38535,                                   appendix A            Q or V                  Certification and qualification to MIL-PRF-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

       Outline letter     Descriptive designator     Terminals     Package style               X               CQCC1-N32                  32         Rectangular leadless chip carrier

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

    Terminal voltage with respect to ground ..........  −0.5 V dc to +7.0 V dc     DC output current ................................  50 mA     Storage temperature range ........................  −65°C to +135°C     Maximum power dissipation (P_D) ...................  1.25 W     Lead temperature (soldering, 10 seconds) .........  +260°C     Thermal resistance, junction-to-case (θ_JC):       Case X .........................................  See MIL-STD-1835     Junction temperature (T_J) ........................  +175°C

    Supply voltage (V_CC) .............................  4.5 V dc to 5.5 V dc     Supply voltage (GND) .............................  0 V     Input high voltage (V_IH)..........................  2.2 V dc minimum     Input low voltage (V_IL)...........................  0.8 V dc maximum     Case operating temperature range (T_C) ............  −55°C to +125°C

    Fault coverage measurement of manufacturing      logic tests (MIL-STD-883, test method 5012) ............ 3/ percent

Intended Use: Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. Device class Q devices will replace device class M devices.

URI: https://yse.yabesh.ir/std/handle/yse/205618

Collections :

DLA - CC - DLA Land and Maritime

Show full item record

contributor author	DLA - CC - DLA Land and Maritime
date accessioned	2017-09-04T18:23:11Z
date available	2017-09-04T18:23:11Z
date copyright	40137
date issued	2009
identifier other	IDLKPCAAAAAAAAAA.pdf
identifier uri	https://yse.yabesh.ir/std/handle/yse/205618
description abstract	This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. The PIN shall be as shown in the following example: Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator.Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. The device type(s) shall identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 4K × 9 CMOS Parallel Synchronous FIFO 50 ns 02 4K × 9 CMOS Parallel Synchronous FIFO 35 ns 03 4K × 9 CMOS Parallel Synchronous FIFO 25 ns 04 4K × 9 CMOS Parallel Synchronous FIFO 20 ns The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CQCC1-N32 32 Rectangular leadless chip carrier The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Terminal voltage with respect to ground .......... −0.5 V dc to +7.0 V dc DC output current ................................ 50 mA Storage temperature range ........................ −65°C to +135°C Maximum power dissipation (P_D) ................... 1.25 W Lead temperature (soldering, 10 seconds) ......... +260°C Thermal resistance, junction-to-case (θ_JC): Case X ......................................... See MIL-STD-1835 Junction temperature (T_J) ........................ +175°C Supply voltage (V_CC) ............................. 4.5 V dc to 5.5 V dc Supply voltage (GND) ............................. 0 V Input high voltage (V_IH).......................... 2.2 V dc minimum Input low voltage (V_IL)........................... 0.8 V dc maximum Case operating temperature range (T_C) ............ −55°C to +125°C Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ............ 3/ percent Intended Use: Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. Device class Q devices will replace device class M devices.
language	English
title	SMD-5962-94511 REV B	num
title	MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 9 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON	en
type	standard
page	26
status	Active
tree	DLA - CC - DLA Land and Maritime:;2009
contenttype	fulltext