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SMD-5962-95651 REV C
MICROCIRCUIT, DIGITAL, RADIATION HARDENED ADVANCED CMOS, QUAD 2-INPUT AND GATE, MONOLITHIC SILICON
| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T18:23:58Z | |
| date available | 2017-09-04T18:23:58Z | |
| date copyright | 07/17/2000 | |
| date issued | 2000 | |
| identifier other | IFMUMAAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/206386 | |
| description abstract | This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. The PIN is as shown in the following example: Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 ACS08 Radiation hardened SOS, advanced CMOS, quad 2-input AND gate 02 ACS08-02 1/ Radiation hardened SOS, advanced CMOS, quad 2-input AND gate The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C CDIP2-T14 14 dual-in-line package X CDFP3-F14 14 flat package The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Supply voltage range (VCC)............................................ −0.5 V dc to +7.0 V dc DC input voltage range (VIN).......................................... −0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT)........................................ −0.5 V dc to VCC + 0.5 V dc DC input current, any one input (IIN)................................. ±10 mA DC output current, any one output (IOUT).............................. ±50 mA Storage temperature range (TSTG)...................................... −65°C to +150°C Lead temperature (soldering, 10 seconds).............................. +265°C Thermal resistance, junction-to-case (θJC): Case outline C....................................................... 24°C/W Case outline X....................................................... 30°C/W Thermal resistance, junction-to-ambient (θJA): Case outline C....................................................... 74°C/W Case outline X....................................................... 116°C/w Junction temperature (TJ)............................................. +175°C Maximum package power dissipation at TA = +125°C (PD): 4/ Case outline C....................................................... 0.68 W Case outline X....................................................... 0.43 W Supply voltage range (VCC)............................................ +4.5 V dc to +5.5 V dc Input voltage range (VIN)............................................. +0.0 V dc to VCC Output voltage range (VOUT)........................................... +0.0 V dc to VCC Maximum low level input voltage (VIL)................................. 30% of VCC Minimum high level input voltage (VIH)................................ 70% of VCC Case operating temperature range (TC)................................. −55°C to +125°C Maximum input rise and fall time at VCC = 4.5 V (tr, tf).............. 10 ns/V Radiation features: Total dose........................................................... > 3 × 105 Rads (Si) Single event phenomenon (SEP) effective linear energy threshold (LET) no upsets (see 4.4.4.4)............... > 100 MeV/(cm2/mg) 5/ Dose rate upset (20 ns pulse)........................................ > 1 × 1011 Rads (Si)/s 5/ Latch-up............................................................. None 5/ Dose rate survivability.............................................. > 1 × 1012 Rads (Si)/s 5/ Intended Use: Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. Device class Q devices will replace device class M devices. | |
| language | English | |
| title | SMD-5962-95651 REV C | num |
| title | MICROCIRCUIT, DIGITAL, RADIATION HARDENED ADVANCED CMOS, QUAD 2-INPUT AND GATE, MONOLITHIC SILICON | en |
| type | standard | |
| page | 22 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;2000 | |
| contenttype | fulltext |
