JEDEC JESD8-23
Unified Wide Power Supply Voltage Range CMOS DC Interface Standard for Non-Terminated Digital Integrated Circuits
Organization:
JEDEC - Solid State Technology Association
Year: 2009
Abstract: This standard defines DC interface parameters and test conditions for a family of non-terminated CMOS digital circuits intended for use over a wide power supply voltage range. The standard bridges a number of existing JEDEC standards in the JESD8-x family to facilitate applications that operate over an ultra-wide power supply voltage range in order to achieve lower power dissipation or higher performance.
Subject: AMB
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contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T17:02:32Z | |
date available | 2017-09-04T17:02:32Z | |
date copyright | 40087 | |
date issued | 2009 | |
identifier other | XUMXOCAAAAAAAAAA.pdf | |
identifier uri | http://yse.yabesh.ir/std/handle/yse/126083 | |
description abstract | This standard defines DC interface parameters and test conditions for a family of non-terminated CMOS digital circuits intended for use over a wide power supply voltage range. The standard bridges a number of existing JEDEC standards in the JESD8-x family to facilitate applications that operate over an ultra-wide power supply voltage range in order to achieve lower power dissipation or higher performance. | |
language | English | |
title | JEDEC JESD8-23 | num |
title | Unified Wide Power Supply Voltage Range CMOS DC Interface Standard for Non-Terminated Digital Integrated Circuits | en |
type | standard | |
page | 10 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2009 | |
contenttype | fulltext | |
subject keywords | AMB | |
subject keywords | FB DIMM | |
subject keywords | FBDIMM | |
subject keywords | FB-DIMM | |
subject keywords | Test Design | |
subject keywords | Validation Design |