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JEDEC JESD82-8.01

Standard for Definition of CU877 PLL Clock Driver for Registered DDR2 DIMM Applications

Organization:
JEDEC - Solid State Technology Association
Year: 2004

Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of a Â'CU877 PLL clock device for registered DDR2 DIMM applications. The purpose is to provide a standard for a Â'CU877 PLL clock device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This document includes minor editorial changes as noted in Annex A, page 16.
URI: http://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/38352
Subject: Clock Driver
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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:36:22Z
date available2017-09-04T15:36:22Z
date copyright02/01/2004
date issued2004
identifier otherOSGYEBAAAAAAAAAA.pdf
identifier urihttp://yse.yabesh.ir/std;quein=autho123393FD081DAC4/handle/yse/38352
description abstractThis standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of a Â'CU877 PLL clock device for registered DDR2 DIMM applications. The purpose is to provide a standard for a Â'CU877 PLL clock device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This document includes minor editorial changes as noted in Annex A, page 16.
languageEnglish
titleJEDEC JESD82-8.01num
titleStandard for Definition of CU877 PLL Clock Driver for Registered DDR2 DIMM Applicationsen
typestandard
page22
statusActive
treeJEDEC - Solid State Technology Association:;2004
contenttypefulltext
subject keywordsClock Driver
subject keywordsDDR2
subject keywordsDDR400
subject keywordsDDR533
subject keywordsPC3200
subject keywordsPLL
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