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IPC 7094
Design and Assembly Process Implementation for Flip Chip and Die Size Components
Organization:
IPC - Association Connecting Electronics Industries
Year: 2009
Abstract: This document describes the design and assembly challenges for implementing flip chip technology in a direct chip attach (DCA) assembly. The effect of bare die or die size components in a flip chip format has an impact on current component characteristics and dictates the appropriate assembly methodology. The focus on the information contained herein is on design, assembly methodology, critical inspection, repair, and reliability issues associated with flip chip, and die size package technologies (including wafer level BGA).
Purpose The target audiences for this document are managers, design and process engineers, and operators and technicians who deal with the electronic assembly, inspection, and repair processes. The intent is to provide useful and practical information to those who are mounting bare die or die size components in a DCA assembly or those who are considering flip chip process implementation.
Purpose The target audiences for this document are managers, design and process engineers, and operators and technicians who deal with the electronic assembly, inspection, and repair processes. The intent is to provide useful and practical information to those who are mounting bare die or die size components in a DCA assembly or those who are considering flip chip process implementation.
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| contributor author | IPC - Association Connecting Electronics Industries | |
| date accessioned | 2017-09-04T16:55:07Z | |
| date available | 2017-09-04T16:55:07Z | |
| date copyright | 02/01/2009 | |
| date issued | 2009 | |
| identifier other | XAQOLCAAAAAAAAAA.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=autho18267D83FCDCAC6/handle/yse/118650 | |
| description abstract | This document describes the design and assembly challenges for implementing flip chip technology in a direct chip attach (DCA) assembly. The effect of bare die or die size components in a flip chip format has an impact on current component characteristics and dictates the appropriate assembly methodology. The focus on the information contained herein is on design, assembly methodology, critical inspection, repair, and reliability issues associated with flip chip, and die size package technologies (including wafer level BGA). Purpose The target audiences for this document are managers, design and process engineers, and operators and technicians who deal with the electronic assembly, inspection, and repair processes. The intent is to provide useful and practical information to those who are mounting bare die or die size components in a DCA assembly or those who are considering flip chip process implementation. | |
| language | English | |
| title | IPC 7094 | num |
| title | Design and Assembly Process Implementation for Flip Chip and Die Size Components | en |
| type | standard | |
| page | 88 | |
| status | Active | |
| tree | IPC - Association Connecting Electronics Industries:;2009 | |
| contenttype | fulltext |