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IEEE Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits
IEEE Std 1838-2019
Year: 2020
Subject: TSV
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IEEE Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits
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| contributor author | IEEE - The Institute of Electrical and Electronics Engineers, Inc. | |
| date accessioned | 2020-09-15T20:15:07Z | |
| date available | 2020-09-15T20:15:07Z | |
| date issued | 2020 | |
| identifier isbn | 978-1-5044-5824 | |
| identifier other | 09036129.pdf | |
| identifier other | 09036129.pdf | |
| identifier uri | http://yse.yabesh.ir/std;query=authoF2377D8669B749A/handle/yse/288458 | |
| language | English | |
| title | IEEE Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits | en |
| title | IEEE Std 1838-2019 | num |
| type | Standard | |
| page | 73 | |
| tree | IEEE - The Institute of Electrical and Electronics Engineers, Inc.:;2020 | |
| contenttype | Fulltext | |
| subject keywords | TSV | |
| subject keywords | test | |
| subject keywords | flexible parallel port | |
| subject keywords | secondary test access port | |
| subject keywords | primary test access port | |
| subject keywords | IEEE 1838 | |
| subject keywords | FPP | |
| subject keywords | 3D test access | |
| subject keywords | multi-tower stack | |
| subject keywords | scan | |
| subject keywords | through-silicon via |