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JEDEC JEP152
DDR2 DIMM Clock Skew Measurement Procedure Using A Clock Reference Board
| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T17:01:54Z | |
| date available | 2017-09-04T17:01:54Z | |
| date copyright | 05/01/2007 | |
| date issued | 2007 | |
| identifier other | XSREACAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/125404 | |
| description abstract | This document is the work product of the JC-45.1 DDR2 DIMM Clock Skew Measurement task group.The purpose of this document is to define procedures to measure clock parameters on registered DIMMs using the DDR2 Clock Reference Board. It is NOT the intent of this document to set specification values or validation requirements. | |
| language | English | |
| title | JEDEC JEP152 | num |
| title | DDR2 DIMM Clock Skew Measurement Procedure Using A Clock Reference Board | en |
| type | standard | |
| page | 30 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2007 | |
| contenttype | fulltext | |
| subject keywords | Clock | |
| subject keywords | DDR2 | |
| subject keywords | DIMM | |
| subject keywords | DRAM | |
| subject keywords | Jitter | |
| subject keywords | Memory | |
| subject keywords | PLL | |
| subject keywords | RAM | |
| subject keywords | Reference Board | |
| subject keywords | Registered | |
| subject keywords | Skew | |
| subject keywords | SRAM | |
| subject keywords | Synchronous DRAM |
