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JEDEC - Solid State Technology Association
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Recent Submissions
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JEDEC JESD234
Abstract: This test standard defines the requirements and procedures for 40 to 500 MeV proton irradiation of electronic devices for Single Event Effects (SEE), and reporting the results. Protons are capable of causing SEE by both ... -
JEDEC JEP147
Abstract: This procedure describes a recommended way to measure pin capacitance of devices with SSTL (Stub Series Terminated Logic) interface pins by use of a Vector Network Analyzer. One purpose of this standard procedure is to ...Subject(s) : Analyzer , DDR SDRAM , DDR2 SDRAM , Input Capacitance , Measurement Procedures , SSTL_18 , SSTL_2 , Vector Network Analyzer , -
JEDEC JESD24
Abstract: This standard contains a listing of terms and definitions and letter symbols; a description of established procedures that are followed in the assignment of semiconductor-industry-type designations to power transistors; ...Subject(s) : Power MOSFETs , Terms and Definitions - Power MOSFETs , Thermal Characteristics - Power MOSFETs , Transistors - Power MOSFETs , -
JEDEC JESD205
Abstract: This specification defines the electrical and mechanical requirements for 240-pin, PC2-4200/PC2-5300/PC2-6400, 72 bit-wide, Fully Buffered Double Data Rate Synchronous DRAM Dual In-Line Memory Modules (DDR2 SDRAM FB-DIMMs).These ...Subject(s) : Advanced Memory Buffer , AMB , FBD , FBDIMM , FB-DIMM , Fully Buffered DIMM , -
JEDEC JESD15-3
Abstract: This document specifies the definition and construction of a two-resistor compact thermal model (CTM) from the JEDEC junction-to-case and junction-to-board thermal metrics. The guidance provided in this document only applies ...Subject(s) : 2-R , compact thermal model , component , device , JESD15 , modeling , package , thermal , two resistor , -
JEDEC JESD24-6
Abstract: This standard describes in detail the method for thermal measurements of Insulated Gate Bipolar Transistors (IGBTs) and is suitable for use both in manufacturing and application of the devices. The method covers both thermal ...Subject(s) : Bipolar Transistors - Insulated Gate , Insulated Gate Bipolar Transistors (IGBT) , Thermal Impedance Measurements - IGBT , Transistors - Insulated Bipolar Gate , -
JEDEC JESD2
Abstract: This standard provides a chip carrier format for digital devices by defining pin functions and locations for 20, 38, 44, 52, and 68-terminal devices.Subject(s) : Bipolar Logic Pinouts , Chip Carriers , Digital Pinouts , -
JEDEC JESD82-2
Abstract: This standard defines the register support devices needed for standard height and low profile registered PC133 SDRAM DIMM modules. The objective of the standard is to clearly define the functionality, pinout and electrical ...Subject(s) : DIMM , LVTTL , Module , PC133 , Register , SSTL_2 , SSTV , -
JEDEC JEP84A
Abstract: This publication covers recommended methods for measurement of transistor lead temperatures under various load conditions. The techniques described are sufficiently accurate for most applications.Subject(s) : Lead Temperature - Transistor , Measurement - Transistor Lead Temperature , Transistor Lead Temperature , -
JEDEC JESD213
Abstract: This document is intended to be used by Original Component Manufacturers who deliver electronic components and Original Equipment Manufacturers who are the platform system integrators. It is intended to be applied prior ...Subject(s) : Component Surface , Electroplated , Finish Materials , Flourescence , Lead (Pb) , Lead Content , Manufacturers , Repair , Tin (Sn) , Weapons , XRF Technolgy , -
JEDEC JESD372
Abstract: General
The measuring system must provide a means for applying bias to the transistor under test. The bias system must be such as not to influence the accuracy of the measurements.
The signal applied ... -
JEDEC JESD12-2
Abstract: The purpose of these benchmarks is to provide a common set of high level functions that serve as vehicles for comparing the performance of cell-based ICs implemented in any technology using any internal structure. JESD12-2 ...Subject(s) : Benchmark Set - Cell Based Integrated Circuits , Integrated Circuits - Cell Based , -
JEDEC JEP157
Abstract: This document was written with the intent to provide information for quality organizations in both semiconductor companies and their customers to assess and make decisions on safe ESD CDM level requirements.Subject(s) : CDM , Charged Device Model , Electrostatic Discharge , ESD , -
JEDEC JESD8-18A
Abstract: This specification defines the high-speed differential point-to-point signaling link for FBDIMM, operating at the buffer supply voltage of 1.5V that is provided at the FBDIMM DIMM connector. This specification also applies ...Subject(s) : 1.5 V , AMB , DDR2 , DIMM , FBD , FBDIMM , FB-DIMM , Fully Buffered , High Speed , Hub , PTP Link , -
JEDEC JESD79-2F
Abstract: This document defines the DDR2 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of ... -
JEDEC TENTSTD12
Abstract: The suppresser furnished under this standard shall be a product that has been tested and meets the definitions and minimum requirements specified herein. -
JEDEC JESD22-A113F
Abstract: This Test Method establishes an industry standard preconditioning flow for nonhermetic solid state SMDs (surface mount devices) that is representative of a typical industry multiple solder reflow operation. These SMDs ...Subject(s) : Preconditioning of Plastic Surface Mount Devices , Test Method - Plastic Surface Mount Preconditioning , -
JEDEC EIA-318-B
Abstract: This standard describes the measurement of signal diodes (IF <=500mA dc) reverse recovery times of less than 300 ns duration. It may, however, also be used for the measurement of longer recovery times. This standard is ...Subject(s) : Diodes , Measurement , Reverse Recovery Time , Signal Diodes , -
JEDEC JEP126
Abstract: This publication provides a guideline to suppliers of IC components with a template for documenting the numerical simulation assumptions. In addition this guideline also suggests a model environment to reference when ...