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DSCC-VID-V62/13606
MICROCIRCUIT, MEMORY, 3.3 V CMOS FIRST-IN, FIRST-OUT, MONOLITHIC SILICON
Organization:
DLA - CC - DLA Land and Maritime
Year: 2013
Abstract: This drawing documents the general requirements of a high performance 3.3 V CMOS first-in, first-out (FIFO) microcircuit, with an operating temperature range of -55°C to +125°C.
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DSCC-VID-V62/13606
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| contributor author | DLA - CC - DLA Land and Maritime | |
| date accessioned | 2017-09-04T18:10:14Z | |
| date available | 2017-09-04T18:10:14Z | |
| date copyright | 06/20/2013 | |
| date issued | 2013 | |
| identifier other | GWUWDFAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/193291 | |
| description abstract | This drawing documents the general requirements of a high performance 3.3 V CMOS first-in, first-out (FIFO) microcircuit, with an operating temperature range of -55°C to +125°C. | |
| language | English | |
| title | DSCC-VID-V62/13606 | num |
| title | MICROCIRCUIT, MEMORY, 3.3 V CMOS FIRST-IN, FIRST-OUT, MONOLITHIC SILICON | en |
| type | standard | |
| page | 36 | |
| status | Active | |
| tree | DLA - CC - DLA Land and Maritime:;2013 | |
| contenttype | fulltext |