JEDEC JEP126
Guideline for Developing and Documenting Package Electrical Models Derived from Computational Analysis
contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T18:36:46Z | |
date available | 2017-09-04T18:36:46Z | |
date copyright | 05/01/1996 | |
date issued | 1996 | |
identifier other | JMAQCAAAAAAAAAAA.pdf | |
identifier uri | https://yse.yabesh.ir/std/handle/yse/218765 | |
description abstract | This publication provides a guideline to suppliers of IC components with a template for documenting the numerical simulation assumptions. In addition this guideline also suggests a model environment to reference when comparing various packages or component suppliers. This publication should improve the communication between the package model suppliers. This publication should improve the communication between the package model supplier and the end user. | |
language | English | |
title | JEDEC JEP126 | num |
title | Guideline for Developing and Documenting Package Electrical Models Derived from Computational Analysis | en |
type | standard | |
page | 9 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;1996 | |
contenttype | fulltext |