JEDEC JESD205
FBDIMM Specification: DDR2 SDRAM Fully Buffered DIMM (FBDIMM) Design Specification
contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T18:48:16Z | |
date available | 2017-09-04T18:48:16Z | |
date copyright | 03/01/2007 | |
date issued | 2007 | |
identifier other | KOICBCAAAAAAAAAA.pdf | |
identifier uri | https://yse.yabesh.ir/std/handle/yse/229519 | |
description abstract | This specification defines the electrical and mechanical requirements for 240-pin, PC2-4200/PC2-5300/PC2-6400, 72 bit-wide, Fully Buffered Double Data Rate Synchronous DRAM Dual In-Line Memory Modules (DDR2 SDRAM FB-DIMMs).These SDRAM FB-DIMMs are intended for use as main memory when installed in systems such as servers and workstations. PC2-4200/PC2-5300/PC2-6400 refers to the DIMM naming convention in which PC2-4200/PC2-5300/PC2-6400 indicates a 240-pin DDR2 DIMM running at 266/333/400 MHz DRAM clock speed and offering 4266/5333/6400 MB/s bandwidth. | |
language | English | |
title | JEDEC JESD205 | num |
title | FBDIMM Specification: DDR2 SDRAM Fully Buffered DIMM (FBDIMM) Design Specification | en |
type | standard | |
page | 129 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2007 | |
contenttype | fulltext | |
subject keywords | Advanced Memory Buffer | |
subject keywords | AMB | |
subject keywords | FBD | |
subject keywords | FBDIMM | |
subject keywords | FB-DIMM | |
subject keywords | Fully Buffered DIMM |