French -- Circuits intégrés – Circuits intégrés tridimensionnels – Partie 3: Modèle et conditions de mesure des trous de liaison à travers le silicium - Edition 1.0|English -- Integrated circuits – Three dimensional integrated circuits – Part 3: Model and measurement conditions of through-silicon via - Edition 1.0
IEC 63011-3
Organization:
IEC - International Electrotechnical Commission
Year: 2018
Abstract: Scope: This part of IEC 63011 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC. 3-D IC specifications covered by this document are the following: • application: digital consumer and mobile; • operating voltage: 0,1 V to 5,0 V, • operating frequency: less than 2,0 GHz. This document does not describe the equipment for the measurement. Figure 1 describes a typical case of multi-chip interconnect system discussed in this document. Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document
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French -- Circuits intégrés – Circuits intégrés tridimensionnels – Partie 3: Modèle et conditions de mesure des trous de liaison à travers le silicium - Edition 1.0|English -- Integrated circuits – Three dimensional integrated circuits – Part 3: Model and measurement conditions of through-silicon via - Edition 1.0
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contributor author | IEC - International Electrotechnical Commission | |
date accessioned | 2020-09-15T22:28:57Z | |
date available | 2020-09-15T22:28:57Z | |
date copyright | 2018.11.01 | |
date issued | 2018 | |
identifier other | AGGOGGAAAAAAAAAA.pdf | |
identifier other | AGGOGGAAAAAAAAAA.pdf | |
identifier uri | https://yse.yabesh.ir/std/handle/yse/289148 | |
description abstract | Scope: This part of IEC 63011 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC. 3-D IC specifications covered by this document are the following: • application: digital consumer and mobile; • operating voltage: 0,1 V to 5,0 V, • operating frequency: less than 2,0 GHz. This document does not describe the equipment for the measurement. Figure 1 describes a typical case of multi-chip interconnect system discussed in this document. Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document | |
language | English, French | |
title | French -- Circuits intégrés – Circuits intégrés tridimensionnels – Partie 3: Modèle et conditions de mesure des trous de liaison à travers le silicium - Edition 1.0|English -- Integrated circuits – Three dimensional integrated circuits – Part 3: Model and measurement conditions of through-silicon via - Edition 1.0 | en |
title | IEC 63011-3 | num |
type | standard | |
page | 32 | |
status | Active | |
tree | IEC - International Electrotechnical Commission:;2018 | |
contenttype | fulltext |