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JEDEC - Solid State Technology Association: Recent submissions
Now showing items 101-120 of 369
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JEDEC JESD236-C
Abstract: This standard details the methods to be followed if color coding is used to identify JEDEC-assigned type numbers or for cathode identification of discrete semiconductor devices. Formerly known as EIA-236-C and/or ...Subject(s) : Color Coding , -
JEDEC EIA-323
Abstract: This standard is applicable to life testing of lead-mounted semiconductor devices intended for applications in a natural air-cooled environment where most of the power dissipation is obtained by convection and radiation ...Subject(s) : Air Convection Cooled Life Test , Environment of Life Test for Lead-Mounted Devices , Life Testing - Lead Mounted Semiconductor Devices , -
JEDEC JEP167
Abstract: This document identifies methods used for the characterization of die adhesion. It gives guidance which method to apply in which phase of the product or technology life cycle.
NOTE Inclusion in this directory of methods ... -
JEDEC JEP103A
Abstract: In order to improve understanding between manufacturers and users, a consistent set of product-documentation classifications associated with the stages of product development.Subject(s) : Classifications , Data Sheet Disclaimers , Disclaimers , Product-Documentation Classifications , -
JEDEC JESD82-24
Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 ...Subject(s) : Buffer , DDR2 , RDIMM , Register , SSTU , SSTUB , -
JEDEC JESD88E
Abstract: Each term and definition in this dictionary has been included strictly for application within the solid-state industry. Many of the terms and definitions in this dictionary may have applicability beyond the scope of the ... -
JEDEC JESD8-12A.01
Abstract: This standard defines power supply voltage ranges, dc interface and switching parameters for a high speed, low voltage family of nonterminated digital circuits driving/driven by parts of the same family, or mixed families ...Subject(s) : CMOS , Normal Range , Power Supply Interface , Schmitt Trigger , Wide Range , -
JEDEC JP002
Abstract: This document will provide insight into the theory behind tin whisker formation as it is known today and, based on this knowledge, potential mitigation practices that may delay the onset of, or prevent tin whisker formation. ...Subject(s) : Acceptance , Growth , Mitigation , Sn whisker theory , Tin Ally , Tin Whiskers , -
JEDEC JESD12-4
Abstract: This standard defines how to specify various performance parameters of semicustom ICs, including cell and interconnect propagation delays, input/output levels and capacitance, and power dissipation.Subject(s) : CMOS Devices - Semicustom ICs , Performance Parameters - CMOS Devices , -
JEDEC JESD82-4B
Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV16859 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM applications. ...Subject(s) : DIMM , Registered Buffer , SSTV16859 , Stacked DDR , -
JEDEC EIA-397
Abstract: One section of this standard presents a thorough explanation of thyristor principals, defining thedifferent classes of these devices, their Physical structure and detailing the numerous test methods and ratings required ...Subject(s) : Test Method - Thyristors , Thyristors , -
JEDEC JESD66
Abstract: This standard is applicable to Thyristor Surge Protective Devices. It describes terms and definitions and explains methods for verifying device ratings and measuring device characteristics. -
JEDEC JESD76
Abstract: This standard continues the voltage specification migration to the next level beyond the 2.5 V specification already established in JESD80. In this standard, the input and output conditions are described for CMOS Logic ...Subject(s) : CMOS Logic Devices - 1.8 V , Low Voltage , -
JEDEC JESD201A
Abstract: The methodology described in this document is applicable for environmental acceptance testing of tin based surface finishes and mitigation practices for tin whiskers. This methodology may not be sufficient for applications ...Subject(s) : Environmental Acceptance , Surface Finished , Susceptibility , Tin , Tin Alloy , Tin Whisker , -
JEDEC JESD57
Abstract: This test method defines requirements and procedures for ground simulation and single event effects (SEE) and implementation of the method in testing integrated circuits. This standard is valid when using a cyclotron or ...Subject(s) : Heavy Ion Irradiation , Single-Event Effects - SEE , -
JEDEC JESD37
Abstract: This standard details techniques for estimating the values of a two parameter lognormal distribution from complete lifetime data (all samples in an experiment have failed) or singly right-censored lifetime data (the ...Subject(s) : Lognormal Analysis , Persson and Rootzen Method , Singly Right - Censored Data , Uncensored Data , -
JEDEC JESD54
Abstract: The purpose is to provide a standard of BiCMOS Logic series specifications to provide for uniformity, multiplicity of sources, elimination of confusion, and ease of device specification and design by users.Subject(s) : BiCMOS Logic Devices , TTL Compatible - BiCMOS Logic Devices , -
JEDEC JESD22-A120A
Abstract: This specification details the procedures for the measurement of characteristic bulk material properties of moisture diffusivity and water solubility in organic materials used in the packaging of IC components. These two ...Subject(s) : Organic Materials , Test Method - Moisture Diffusivity , Test Method - Water Solubility , -
JEDEC JESD46D
Abstract: This document covers solid-state products and their associated processes.
This standard establishes procedures to notify customers of changes to solid-state products and associated processes. -
JEDEC JEP150.01
Abstract: This publication contains a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as well as individual solid ...