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JEDEC J-STD-609A.01

Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Lead-Free (Pb-Free) and Other Attributes

Organization:
JEDEC - Solid State Technology Association
Year: 2011

Abstract: This standard applies to components and assemblies that contain Pb-free and Pb-containing solders and finishes. This standard describes the marking of components and the labeling of their shipping containers to identify their 2nd level terminal finish or material, and applies to components that are intended to be attached to boards or assemblies with solder or mechanical clamping or are press fit. This standard also applies to 2nd level terminal materials for bumped die that are used for direct board attach.
This standard applies to boards/assemblies, to identify the type of Pb-free or Pb-containing solder used. This standard documents a method for identifying board surface finishes and Printed Circuit Board (PCB) resin systems. This standard applies to PCB base materials and for marking the type of conformal coating utilized on Printed Circuit Board Assemblies (PCBAs). Material and their containers previously marked or labeled according to JESD 97, IPC-1066, or previous versions of this standard need not be remarked unless agreed upon by the supplier and customer.
Labeling of exterior surfaces of finished articles, such as computers, printers, servers, and the like, is outside the scope of this standard. However internal PCBs and PCBAs are covered by this standard. Labeling of retail packages containing electronic products is also outside the scope of this standard.
Purpose
This standard provides a marking and labeling system that aids in assembly, rework, repair and recycling and provides for the identification of:
1) those assemblies that are assembled with Pb-containing or Pb-free solder;
2) components that have Pb-containing or Pb-free 2nd level interconnect terminal finishes and materials;
3) the maximum component temperature not to be exceeded during assembly or rework processing;
4) the base materials used in the PCB construction, including those PCBs that use halogen-free resin;
5) the surface finish of PCBs; and
6) the conformal coating on PCBAs.
URI: https://yse.yabesh.ir/std/handle/yse/16360
Subject: Labeling
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  • JEDEC - Solid State Technology Association
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    JEDEC J-STD-609A.01

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contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T15:17:00Z
date available2017-09-04T15:17:00Z
date copyright02/01/2011
date issued2011
identifier otherMLLUYDAAAAAAAAAA.pdf
identifier urihttps://yse.yabesh.ir/std/handle/yse/16360
description abstractThis standard applies to components and assemblies that contain Pb-free and Pb-containing solders and finishes. This standard describes the marking of components and the labeling of their shipping containers to identify their 2nd level terminal finish or material, and applies to components that are intended to be attached to boards or assemblies with solder or mechanical clamping or are press fit. This standard also applies to 2nd level terminal materials for bumped die that are used for direct board attach.
This standard applies to boards/assemblies, to identify the type of Pb-free or Pb-containing solder used. This standard documents a method for identifying board surface finishes and Printed Circuit Board (PCB) resin systems. This standard applies to PCB base materials and for marking the type of conformal coating utilized on Printed Circuit Board Assemblies (PCBAs). Material and their containers previously marked or labeled according to JESD 97, IPC-1066, or previous versions of this standard need not be remarked unless agreed upon by the supplier and customer.
Labeling of exterior surfaces of finished articles, such as computers, printers, servers, and the like, is outside the scope of this standard. However internal PCBs and PCBAs are covered by this standard. Labeling of retail packages containing electronic products is also outside the scope of this standard.
Purpose
This standard provides a marking and labeling system that aids in assembly, rework, repair and recycling and provides for the identification of:
1) those assemblies that are assembled with Pb-containing or Pb-free solder;
2) components that have Pb-containing or Pb-free 2nd level interconnect terminal finishes and materials;
3) the maximum component temperature not to be exceeded during assembly or rework processing;
4) the base materials used in the PCB construction, including those PCBs that use halogen-free resin;
5) the surface finish of PCBs; and
6) the conformal coating on PCBAs.
languageEnglish
titleJEDEC J-STD-609A.01num
titleMarking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Lead-Free (Pb-Free) and Other Attributesen
typestandard
page22
statusActive
treeJEDEC - Solid State Technology Association:;2011
contenttypefulltext
subject keywordsLabeling
subject keywordsMarking
subject keywordsPb
subject keywordsPB-Free
subject keywordsPCB
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