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JEDEC JESD12-3
CMOS Gate Array Macrocell Standard
Organization:
JEDEC - Solid State Technology Association
Year: 1986
Abstract: This standard defines a minimum set of macro cell standards for CMOS gate arrays. A total of 41 macro cell types are addressed, all of which are commonly used by gate array designers to implement Application Specific Integrated Circuits.
Subject: CMOS Devices - Gate Array
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T17:53:59Z | |
| date available | 2017-09-04T17:53:59Z | |
| date copyright | 01/01/1986 | |
| date issued | 1986 | |
| identifier other | FFWZCAAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/177111 | |
| description abstract | This standard defines a minimum set of macro cell standards for CMOS gate arrays. A total of 41 macro cell types are addressed, all of which are commonly used by gate array designers to implement Application Specific Integrated Circuits. | |
| language | English | |
| title | JEDEC JESD12-3 | num |
| title | CMOS Gate Array Macrocell Standard | en |
| type | standard | |
| page | 16 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1986 | |
| contenttype | fulltext | |
| subject keywords | CMOS Devices - Gate Array | |
| subject keywords | Gate Array | |
| subject keywords | Macrocell Types |