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Terminology and Methods of Measurement for Bistable Semiconductor Microcircuits

contributor authorJEDEC - Solid State Technology Association
date accessioned2017-09-04T18:04:56Z
date available2017-09-04T18:04:56Z
date copyright01/01/1969
date issued1969
identifier otherGIFQCAAAAAAAAAAA.pdf
identifier urihttps://yse.yabesh.ir/std/handle/yse/187851
description abstractThis bulletin explains the terminology and methods of measurement for bistable semiconductor microcircuits. It is also intended to be used with the EIA Registration Data Format for semiconductor integrated bistable logic circuits. 
languageEnglish
titleJEDEC JEB15num
titleTerminology and Methods of Measurement for Bistable Semiconductor Microcircuitsen
typestandard
page95
statusActive
treeJEDEC - Solid State Technology Association:;1969
contenttypefulltext
subject keywordsLetter Symbols
subject keywordsQuick Reference Guide
subject keywordsSymbols - Quick Reference Guide Data Sheet Disclaimers


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