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JEDEC JEB15
Terminology and Methods of Measurement for Bistable Semiconductor Microcircuits
Organization:
JEDEC - Solid State Technology Association
Year: 1969
Abstract: This bulletin explains the terminology and methods of measurement for bistable semiconductor microcircuits. It is also intended to be used with the EIA Registration Data Format for semiconductor integrated bistable logic circuits.
Subject: Letter Symbols
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T18:04:56Z | |
| date available | 2017-09-04T18:04:56Z | |
| date copyright | 01/01/1969 | |
| date issued | 1969 | |
| identifier other | GIFQCAAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/187851 | |
| description abstract | This bulletin explains the terminology and methods of measurement for bistable semiconductor microcircuits. It is also intended to be used with the EIA Registration Data Format for semiconductor integrated bistable logic circuits. | |
| language | English | |
| title | JEDEC JEB15 | num |
| title | Terminology and Methods of Measurement for Bistable Semiconductor Microcircuits | en |
| type | standard | |
| page | 95 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;1969 | |
| contenttype | fulltext | |
| subject keywords | Letter Symbols | |
| subject keywords | Quick Reference Guide | |
| subject keywords | Symbols - Quick Reference Guide Data Sheet Disclaimers |