JEDEC JESD82-5
Description of a 3.3 V, Zero Delay Clock Distribution Device Compliant with JESD21-C, PC133 Registered DIMM Specification
Organization:
JEDEC - Solid State Technology Association
Year: 2002
Abstract: This standard defines the PLL support devices required for standard height and low profile registered PC133 SDRAM DIMM modules. The objective of the standard is to clearly define the functionality, pinout and electrical characteristics of the PLL used on JEDEC standard modules.JESD82-5 is the latest specification to be added to the JESD82 family of specifications for memory module support devices. Additional specifications are currently under development for DDR2 support devices.
Subject: DIMM
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contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T18:26:54Z | |
date available | 2017-09-04T18:26:54Z | |
date copyright | 07/01/2002 | |
date issued | 2002 | |
identifier other | IMRQZAAAAAAAAAAA.pdf | |
identifier uri | https://yse.yabesh.ir/std/handle/yse/209088 | |
description abstract | This standard defines the PLL support devices required for standard height and low profile registered PC133 SDRAM DIMM modules. The objective of the standard is to clearly define the functionality, pinout and electrical characteristics of the PLL used on JEDEC standard modules.JESD82-5 is the latest specification to be added to the JESD82 family of specifications for memory module support devices. Additional specifications are currently under development for DDR2 support devices. | |
language | English | |
title | JEDEC JESD82-5 | num |
title | Description of a 3.3 V, Zero Delay Clock Distribution Device Compliant with JESD21-C, PC133 Registered DIMM Specification | en |
type | standard | |
page | 16 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2002 | |
contenttype | fulltext | |
subject keywords | DIMM | |
subject keywords | Memory Modules | |
subject keywords | PC133 | |
subject keywords | PLL |