IEEE 1149.7
Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture - IEEE Computer Society
Year: 2009
Abstract: The standard will define a link between IEEE 1149.1 interfaces in Debug and Test Systems (DTS) and IEEE 1149.1 (JTAG) interfaces in Target Systems (TS). The link defined by this standard introduces an additional layer between these legacy interfaces. This layer may be viewed as an adapter that provides new functionality and features while preserving all elements of the original IEEE 1149.1 (JTAG) interfaces. The standard will define the link behavior (including timing characteristics of signals), protocols, and functionality of the adapters deployed within the DTS and TS. The standard will not modify or create inconsistencies with IEEE 1149.1 (JTAG). The standard will define a superset of the IEEE 1149.1 specification and achieve compliance with IEEE Std 1149.1TM-2001.1
Purpose
The purpose of the standard is to define a debug and test interface that meets an expanding set of challenges facing Debug and Test Systems (many of which have emerged since the inception of the original IEEE Std 1149.1) while preserving the hardware and software investments of the many industries currently using IEEE Std 1149.1-2001.
1 Information on references can be found in Clause 2.
Purpose
The purpose of the standard is to define a debug and test interface that meets an expanding set of challenges facing Debug and Test Systems (many of which have emerged since the inception of the original IEEE Std 1149.1) while preserving the hardware and software investments of the many industries currently using IEEE Std 1149.1-2001.
1 Information on references can be found in Clause 2.
Subject: 1149.1
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contributor author | IEEE - The Institute of Electrical and Electronics Engineers, Inc. | |
date accessioned | 2017-09-04T15:22:05Z | |
date available | 2017-09-04T15:22:05Z | |
date copyright | 40156 | |
date issued | 2009 | |
identifier other | ATLIQCAAAAAAAAAA.pdf | |
identifier uri | http://yse.yabesh.ir/std/handle/yse/22101 | |
description abstract | The standard will define a link between IEEE 1149.1 interfaces in Debug and Test Systems (DTS) and IEEE 1149.1 (JTAG) interfaces in Target Systems (TS). The link defined by this standard introduces an additional layer between these legacy interfaces. This layer may be viewed as an adapter that provides new functionality and features while preserving all elements of the original IEEE 1149.1 (JTAG) interfaces. The standard will define the link behavior (including timing characteristics of signals), protocols, and functionality of the adapters deployed within the DTS and TS. The standard will not modify or create inconsistencies with IEEE 1149.1 (JTAG). The standard will define a superset of the IEEE 1149.1 specification and achieve compliance with IEEE Std 1149.1TM-2001.1 Purpose The purpose of the standard is to define a debug and test interface that meets an expanding set of challenges facing Debug and Test Systems (many of which have emerged since the inception of the original IEEE Std 1149.1) while preserving the hardware and software investments of the many industries currently using IEEE Std 1149.1-2001. 1 Information on references can be found in Clause 2. | |
language | English | |
title | IEEE 1149.7 | num |
title | Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture - IEEE Computer Society | en |
type | standard | |
page | 1037 | |
status | Active | |
tree | IEEE - The Institute of Electrical and Electronics Engineers, Inc.:;2009 | |
contenttype | fulltext | |
subject keywords | 1149.1 | |
subject keywords | 1149.7 | |
subject keywords | 2-pin | |
subject keywords | 2-wire | |
subject keywords | 4-pin | |
subject keywords | 4-wire | |
subject keywords | Advanced Protocol | |
subject keywords | Advanced Protocol Unit | |
subject keywords | APU | |
subject keywords | Background Data Transfer | |
subject keywords | background data transport | |
subject keywords | BDX | |
subject keywords | boundary scan | |
subject keywords | BSDL | |
subject keywords | BSDL.1 | |
subject keywords | BSDL.7 | |
subject keywords | BYPASS | |
subject keywords | Capture-IR | |
subject keywords | CDX | |
subject keywords | Chip-Level TAP Controller | |
subject keywords | CID | |
subject keywords | Class T0 | |
subject keywords | Class T1 | |
subject keywords | Class T2 | |
subject keywords | Class T3 | |
subject keywords | Class T4 | |
subject keywords | Class T5 | |
subject keywords | CLTAPC | |
subject keywords | compact JTAG | |
subject keywords | compliant behavior | |
subject keywords | compliant operation | |
subject keywords | control level | |
subject keywords | controller address | |
subject keywords | Controller ID | |
subject keywords | Controller Identification Number | |
subject keywords | CP | |
subject keywords | Custom Data Transfer | |
subject keywords | custom data transport | |
subject keywords | Data Register | |
subject keywords | debug and test interface | |
subject keywords | debug interface | |
subject keywords | debug logic | |
subject keywords | Debug Test System | |
subject keywords | debug test target | |
subject keywords | DOT1 | |
subject keywords | DOT7 | |
subject keywords | DTI | |
subject keywords | DTS | |
subject keywords | DTT | |
subject keywords | EOT | |
subject keywords | EPU | |
subject keywords | Escape | |
subject keywords | extended operation | |
subject keywords | Extended Protocol | |
subject keywords | EXTEST | |
subject keywords | HSDL | |
subject keywords | HSDL.7 | |
subject keywords | IDCODE | |
subject keywords | Instruction Register | |
subject keywords | JScan | |
subject keywords | JScan0 | |
subject keywords | JScan1 | |
subject keywords | JScan2 | |
subject keywords | JScan3 | |
subject keywords | JTAG | |
subject keywords | MScan | |
subject keywords | MTCP | |
subject keywords | Multi-TAP Control Path | |
subject keywords | narrow Star Scan Topology | |
subject keywords | nTRST | |
subject keywords | nTRST_PD | |
subject keywords | optimized scan | |
subject keywords | OScan | |
subject keywords | OScan0 | |
subject keywords | OScan1 | |
subject keywords | OScan2 | |
subject keywords | OScan3 | |
subject keywords | OScan4 | |
subject keywords | OScan5 | |
subject keywords | OScan6 | |
subject keywords | OScan7 | |
subject keywords | Pause-DR | |
subject keywords | Pause-IR | |
subject keywords | PC0 | |
subject keywords | PC1 | |
subject keywords | Reset and selection unit | |
subject keywords | RSU | |
subject keywords | RTI | |
subject keywords | Run-Test/Idle | |
subject keywords | scan | |
subject keywords | scan DR | |
subject keywords | scan format | |
subject keywords | scan IR | |
subject keywords | Scan Packet | |
subject keywords | scan path | |
subject keywords | scan performance | |
subject keywords | scan protocol | |
subject keywords | Scan Selection Directive | |
subject keywords | Scan Topology | |
subject keywords | series | |
subject keywords | Series Branch | |
subject keywords | Series Scan | |
subject keywords | Series Scan Topology | |
subject keywords | Series Topology | |
subject keywords | Series-Equivalent Scan | |
subject keywords | Shift-DR | |
subject keywords | Shift-IR | |
subject keywords | SiP | |
subject keywords | SP | |
subject keywords | SScan | |
subject keywords | SScan0 | |
subject keywords | SScan1 | |
subject keywords | SScan2 | |
subject keywords | SScan3 | |
subject keywords | SSD | |
subject keywords | stall | |
subject keywords | Standard Protocol | |
subject keywords | star scan | |
subject keywords | Star Scan Topology | |
subject keywords | Star Topology | |
subject keywords | Star-2 | |
subject keywords | Star-2 Branch | |
subject keywords | Star-2 Scan | |
subject keywords | Star-4 | |
subject keywords | Star-4 Branch | |
subject keywords | Star-4 Scan | |
subject keywords | Star-4 Scan Topology | |
subject keywords | STL | |
subject keywords | System Test Logic | |
subject keywords | T0 | |
subject keywords | T0 TAP.7 | |
subject keywords | T1 | |
subject keywords | T1 TAP.7 | |
subject keywords | T2 | |
subject keywords | T2 TAP.7 | |
subject keywords | T3 | |
subject keywords | T3 TAP.7 | |
subject keywords | T4 | |
subject keywords | T4 TAP.7 | |
subject keywords | T4(N) | |
subject keywords | T4(N) TAP.7 | |
subject keywords | T4(W) | |
subject keywords | T4(W) TAP.7 | |
subject keywords | T5 | |
subject keywords | T5 TAP.7 | |
subject keywords | T5(N) | |
subject keywords | T5(N) TAP.7 | |
subject keywords | T5(W) | |
subject keywords | T5(W) TAP.7 | |
subject keywords | TAP | |
subject keywords | TAP controller | |
subject keywords | TAP controller address | |
subject keywords | TAP selection | |
subject keywords | TAP.1 | |
subject keywords | TAP.7 | |
subject keywords | TAPC | |
subject keywords | TCA | |
subject keywords | TCKC | |
subject keywords | TDI | |
subject keywords | TDIC | |
subject keywords | TDOC | |
subject keywords | TDOE | |
subject keywords | Test Access Port | |
subject keywords | test and debug | |
subject keywords | Test-Logic-Reset | |
subject keywords | TLR | |
subject keywords | TMSC | |
subject keywords | TP | |
subject keywords | Transport Packet | |
subject keywords | Update-DR | |
subject keywords | Update-IR | |
subject keywords | ZBS | |
subject keywords | zero bit scan |