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JEDEC JESD82-9B
Definition of the SSTU32865 Registered Buffer with Parity for 2R × 4 DDR2 RDIMM Applications
Organization:
JEDEC - Solid State Technology Association
Year: 2007
Abstract: This standard provides the functional definition, ball-out configuration and package outline, signal definitions and input/output characteristics for a 28-bit 1:2 registered driver with parity suitable for use on DDR2 RDIMMs. The SSTU32865 integrates the functional equivalent of two SSTU32864 devices (as defined in JESD82-7) into a single device, thereby easing layout and board design constraints especially on high density RDIMMs such as dual rank, by four configurations. Moreover, the optional use of a parity function is provided for, permitting detection and reporting of parity errors across its 22 data inputs. JESD82-9 specifies a 160-pin Thin-profile, fine-pitch ball-grid array (TFBGA) package.
Subject: DDR2
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JEDEC JESD82-9B
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T18:30:44Z | |
| date available | 2017-09-04T18:30:44Z | |
| date copyright | 05/01/2007 | |
| date issued | 2007 | |
| identifier other | IWXDACAAAAAAAAAA.pdf | |
| identifier uri | https://yse.yabesh.ir/std/handle/yse/212922 | |
| description abstract | This standard provides the functional definition, ball-out configuration and package outline, signal definitions and input/output characteristics for a 28-bit 1:2 registered driver with parity suitable for use on DDR2 RDIMMs. The SSTU32865 integrates the functional equivalent of two SSTU32864 devices (as defined in JESD82-7) into a single device, thereby easing layout and board design constraints especially on high density RDIMMs such as dual rank, by four configurations. Moreover, the optional use of a parity function is provided for, permitting detection and reporting of parity errors across its 22 data inputs. JESD82-9 specifies a 160-pin Thin-profile, fine-pitch ball-grid array (TFBGA) package. | |
| language | English | |
| title | JEDEC JESD82-9B | num |
| title | Definition of the SSTU32865 Registered Buffer with Parity for 2R × 4 DDR2 RDIMM Applications | en |
| type | standard | |
| page | 26 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2007 | |
| contenttype | fulltext | |
| subject keywords | DDR2 | |
| subject keywords | RDIMM | |
| subject keywords | Registered Buffer | |
| subject keywords | SSTU | |
| subject keywords | SSTU32865 |